Oscillation Monitor

The circuit in the diagram was originally designed to monitor an oscillator, but can also be used as a general-purpose level indicator for a.c. signals. It is based on a quadruple IC containing four NAND gates. Only three of the gates are used, making the fourth free for other purposes. All the gates have a Schmitt trigger input. When a 5 V supply is used, the Type 74HC132 is recommended; for higher voltage, a Type 4093. Note, however, that these two ICs have different pinouts. In the diagram, the differing pins of a 4093 are shown in brackets. The signal to be monitored is applied to the input of the first gate via capacitor C1. Resistor R2, in conjunction with the protection diode in the IC, guards the input to high voltages.

In the absence of a signal, resistor R1 holds the input high so that the output of the gate is low. When a signal of sufficient strength is received, the input of the gate goes low during the negative half cycle of the signal, so that the output of the gate goes high in rhythm with the input signal. However, the Schmitt trigger converts sinusoidal signals into rectangular ones, which charge capacitor C3 via diode D1. When the potential across C3 exceeds the threshold at the input of the second gate, this gate also toggles. The output of the second gate is then low, which disables the third gate, which functions as an oscillator. When the level of the input signal drops, C3 is discharged via R3.

The potential across the capacitor then no longer exceeds the threshold at the input of IC1b, whereupon IC1c is enabled and the LED flashes The LED may be connected as shown or as indicated by the dashed line. As shown, the diode remains off when there is an input signal of sufficient strength and begins to flash when the signal fails or its level drops. When the diode is linked to earth, it is on continuously when there is an input signal, and begins to flash when the input drops. When a 5 V power supply is used, R5 = 1 kΩ, and the circuit draws a current, including that of the LED, of 3 mA. The frequency of the input signal may lie between 10 Hz and 10 MHz. When a 9–12 V supply is used, the value of R5 must be altered as necessary.

Owing to the 4093 being slower than the 74HC132, the upper frequency of the input signal is then limited to 3 MHz. When the wiper of P1 is at the level of the supply voltage, the response threshold, USS, lies between 3.5 V (when Ub =5V) and 7 V (when Ub =12V). When the wiper is moved away from the positive supply line, USS (max) is 1.5 V (when Ub = 5 V). The response threshold is quite precise: a drop in the input signal level of 50–100 mV is sufficient to disable the input. When the input level is too high, a preset across the input terminals enables the level to be reduced to a value that lies in the desired range above the response threshold.

Pan Pot

A pan pot enables a mono-phonic input signal to be positioned where desired between the stereo loudspeakers. When P1 (see diagram) is in the center position, there is no attenuation or amplification between the input and output. When the control is turned away from the center position, the signal in one channel will be amplified 3 dB more than the other.

Circuit IC1 at the input is a buffer stage. It is arranged as an inverter to ensure that the phase of the input signal is identical to that of the output signal. The input impedance is set by R1 (10 kΩ). The output of the buffer is applied to stereo amplifiers IC2 and IC3. A special arrangement here is the positioning of P1, in conjunction with R3, R4, R8, and R9, in the feedback circuits of both amplifiers. This means that any adjustment of the potentiometer will have opposite effects in the amplifiers.

Series resistors R7 and R12 serve to ensure that the outputs can handle capacitive loads. Coupling capacitors C3, C6, and C9, may be omitted if an offset voltage of 20–30 mV is of no consequence in the relevant application. Capacitors C2, C5, and C8, ensure that the op amps remain stable even at unity gain. Capacitors C1, C4, and C7, minimize any r.f. interference, resulting in a usable bandwidth of 2.5 Hz to 200 kHz.

The performance of the circuit is of sufficiently high quality to allow the pot being incorporated in good-quality control panels. Total harmonic distortion plus noise (THD+N) at a frequency of 1 kHz and a bandwidth of 22 kHz is 0.0014%. Over the band 20 Hz to 20 kHz and a bandwidth of 80 dB, this figure is still only 0.0023%. The circuit needs a power supply of ±18 V, from which it draws a current of about 16 mA.

Sounds From The Old West

This circuit shows how far integration can be taken: IC1, a Type HT82207 from Holtek does virtually everything. Only a (small) loudspeaker and the necessary selectors need to be added. The standard 18-pin Type HT82207 is an integrated sound generator, producing sounds typical of the Old West. The various sounds are selected by S1–S6 as listed below. In the quiescent state, the circuit draws a current not exceeding 1 µA.

    S1 – bugle
    S2 – neighing
    S3 – sound of hooves
    S4 – pistol shot
    S5 – crack of a rifle
    S6 – cannon fire

Circuit diagram:

Mini Audio Signal Generator

A small audio test generator is very useful for quickly tracing a signal through an audio unit. Its main purpose is speed rather than refinement. A single sine-wave signal of about 1 kHz is normally all that is needed: distortion is not terribly important. It is, however, important that the unit does not draw too high a current. The generator described meets these modest requirements.

It uses standard components, produces a signal of 899 Hz at an output level of 1 V r.m.s. and draws a current of only 20 µA. In theory, the low current drain would give a 9 V battery a life of 25,000 hours. The circuit is a traditional Wien bridge oscillator based on a Type TLC271 op amp. The frequency determining bridge is formed by C1, C2 and R1–R4. The two inputs of the op amp are held at half the supply voltage by dividers R3-R4 and R5-R6 respectively.

Circuit diagram:

Resistors R5 and R6 also form part of the feedback loop. The amplification is set to about ´3 with P1. Diodes D1 and D2 are peak limiters. Since the limiting is based on the non-linearity of the diodes, there is a certain amount of distortion. At the nominal output voltage of 1 V r.m.s., the distortion is about 10%. This is, however, of no consequence in fast tests.

Nevertheless, if 10% is considered too high, it may be improved appreciably by linking pin 8 of IC1 to ground. This increases the current drain of the circuit to 640 µA, but the distortion is down to 0.7%, provided the circuit is adjusted properly. If a distortion meter or similar is not available, simply adjust the output to 1 V r.m.s. Since the distortion of the unit is not measured in hundredths of a per cent, C1 and C2 may be ceramic types without much detriment.